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Surface Mount Technology Quiz Test your understanding of SMT with the questions below. If you have trouble answering some of the questions, you may benefit from courses taught by Mr. Ray Prasad.A: QUESTIONS ON SMT OVERVIEW: 1. For what do the following acronyms stand? BGA COB CSP MELF MCM PLCC PQFP SO/SOIC SOT TAB/TCP/COT TSOP LCC MLF CBGA CCGA QFN 2. Indicate which of the SMT board Types (I, II, III) typically makes use of each of the following components and processes: (circle as many as apply) Wave soldering: Type I Type II Type III Reflow soldering Type I Type II Type III Leaded SMT components Type I Type II Type III Leadless Resistors/Caps Type I Type II Type III THMT components Type I Type II Type III Adhesive attachment Type I Type II Type III Solder paste Type I Type II Type III 2. A manufacturing facility has the capability of producing Type II SMT assemblies. What additional equipment is necessary to produce Type I assemblies? 3. Another manufacturing facility has full THMT production capability plus a pick-and-place machine (with adhesive dispensing), and an infrared oven. What SMT assembly types is it capable of producing? 4. On a Type II board, which are placed first on the primary side: SMT devices or THMT devices? Why? 5. What is the biggest problem with larger body surface mount packages? 6. What is the PRIMARY function of the adhesive used in Type II and III assembly? 7. List some of the key elements of strong internal infrastructure. 8. What are some of the reasons that will keep us in through hole technology for some time to come? 9. Which way should the colored side a chip resistor face? Why? 10. What does the resistor designation 1206 mean? and 1825? Which chip component is considered to be on the leading edge of technology? 11. What is the difference between Japanese (EIAJ) and American (JEDEC) standard fine pitch packages? 12. Is there one particular lead configuration better than other? Why? Which direction are we headed? What is lead coplanarity requirement for component? Is it different for BGA? 13. List at least five major features of a Pick and Place Machine. 14. What determines through put? Pick and place or Screen printer? 15. Which plays a greater role in overall level of defect? Choose one - Pick and place, screen printer, reflow oven 16. What are the major requirements for a screen printer? 17. What are major requirements for a reflow overn? 18. What determines solder joint reliability in PCAs? a) height of solder joint, b) pitch of leads? 19. Name some of the advanced packaging technologies 20. What is KGD? 21. Why has TAB not really taken off? 22. Where and why does flip chip technology really make sense? 23. Why and when do you need to consider MCM? 24. What are the differences between CBGA balls and PBGA balls? 25. When and why do you use CCGA? What are the disadvantages of CCGAs? 26. What are the pros and cons of MLF packages? 27. What are the reasons for going to a Subcontract Manufacturer? B: QUESTIONS ON SMT DESIGN: 1. DFM is the key to high yield. If the board is designed for manufacturing, any manufacturing house can achieve the same yield. True/False 2. When we say board has DFM problems, what are we talking about? Please give some examples. 3. Why does every company need its own unique internal DFM document? Which industry document is a good starting point? Why is that document not adequate? 4. What is the difference between design rule and design guideline? Do we really need both? Why? 5. What are the pros and cons of HASL, OSP and Immersion gold surface finishes? 6. How does hole size and layer count affect the cost of PCB? Why? 7. What are the major cost drivers in Printed Boards? 8. What are the causes of bridging in SOIC when wave soldering? 9. How do you prevent opens in reflowed fine pitch leads during wave soldering? 10. Is via in pad design acceptable? When and why? When and why not? 11. What causes plastic package cracking? List some of the MAJOR contributing factors. 12. How can plastic package cracking be prevented? Is there an industry standard available? If yes, please list their names. 13. Why isn't moisture-induced package cracking a problem for plastic DIPs? Why is it even a bigger problem for BGA? 14. Of all the DFM rules and guidelines, which one is the most critical DFM rule? 15. Of all the factors that require higher inter-package spacing, which one among them is the key driver for minimum spacing? 16. What might the impact be of violating interpackage spacing rules? 17. Interpackage spacing rules are dependent of the soldering method used (wave solder or reflow solder), because they are related to auto-placement, test, and rework. True/False 18. How thin can the solder mask strips be for screened, dry film and photoimageable solder masks? 19. What is the minimum pitch where you can place photoimageable soldermask between conductors? 20. What is the orientation of SOIC during wave soldering? 21. Please list the surface mount components that can be wave soldered? 22. What are the spacing for capped and uncapped vias? 23. Via in Pad is generally not a common practice for reflow. Why? 24. Why and where via in pad design is becoming a necessary? What are the consequences of it? 25. Why is it necessary to cap vias under fine pitch and BGAs if the board goes through wave soldering? 26. What are the test options for Surface mount assemblies? 27. What are the pros and cons of in-incircuit and functional test? 28. When does it make sense to use only functional test? And in-circuit? 29. What is the minimum test pad size that can be used to minimize misses? 30. What is the main impact of BGA on board design? 31. What are the impacts poor land pattern design? 32. What are the main problems (difficulties)in designing land pattern design? 33. Why should the land pattern length be longer for capacitor than resistor even though they are the same size? 34. In chip component pad design, which is important? Pad width or pad length? 35. What are the main causes of tombstoning? 36. What is the one thing in pad design that you can do to minimize component shift, draw-bridge, and tombstoning during reflow? 37. Which fillet is important for gull wing leads? And for J type leads? 38. How can you prevent MELFs from rolling off during reflow? 39. Which is the preferred design approach for BGA- NSDM or SMD pad? Why? 40. What are some of the common defects caused by poor land pattern design? 41. For a given component, if both wave and reflow soldering can process it, is it a good idea to use the same pad designs for both processes? If yes, Why? If not, why? 42. What is the reason for non-soldermask defined pad for BGA? 43. Should the aperture for stencil be bigger or smaller than the pad? Why? When is the reverse true? C: QUESTIONS ON SMT MANUFACTURING: 1. How is adhesive applied to the board? What type of process is used to cure adhesive? 2. Does it take less time to cure adhesive in a 10-zone oven than a 4-zone oven? 3. What defects are caused by excess adhesive? Insufficient adhesives? 4. What are consequences of not controlling the temperature ramp rate during adhesive cure? 5. Which has most impact on cure strength during adhesive cure: cure temperature or cure time? 6. What is the minimum cure strength needed to ensure that bottom side components do not fall off during wave soldering 7. What is the composition of the most widely used solder in the electronics industry? At what temperature does the solder melt? 8. List some of the common causes of solder balls? 9. What is the size distribution of solder paste powder particles if there are no fine pitch components on the board? Why is it necessary to change this size distribution for fine pitch technology? 10. Why is it necessary to bring solder paste and adhesive to room temperature before use? 11. Which is going to be less of a concern if there is misprinting – misprinting along the sides of chip component pads or along the lengths of chip component pads? Why? 12. Which is most widely used in the industry - Stencils or Screens? Why? Metal Squeegee or Rubber squeegee? Why? 13. What is the recommended aspect ratio for stencil aperture design? And recommended area ratio? What is the main reason? 14. What is the ratio of aperture width to solder power size for good printing? 15. What are some of the key features of etched, laser cut and electroformed stencils? 16. Should the stencil aperture be smaller or larger than pad? Why? Give an example where the reverse is true. 17. What is the minimum solder volume requirement for CBGA? 18. Why solder volume is not so critical for PBGA? But why and when is it preferable to use paste and not only flux for PBGA? 19. How would you prevent solder beads or “squeez balls” (large solder balls trapped under chip components)? 20. What are the standards for solderability test? Please list their number? 21. How is dewetting differentiated from non-wetting? List the names of industry solderability specs. 22. What are three different types of IR reflow processes? Which one is most common today? Why? 23. Can only one solder profile be used for all products when using forced convection IR? 24. How should thermal profile be developed? 25. True or flase: Reflow profile is solder paste flux dependent. Why? 26. True or false: Each product needs its own unique profile. Why? 27. What are the pros and cons of “long soak topeak” and “ramp to peak” profiles? 28. In developing solder profile for BGA, what is critical requirement and how is it achieved? 29. What are some of the major problems in wave soldering? 30. If the board were designed for wave soldering, what would be the cause of bridging in SOIC during wave soldering? 31. What are the benefits of N2? Can design and process problems be avoided by the use of Nitrogen? 32. Why is a nickel barrier important for ceramic chip capacitors? 33. What causes ceramic capacitor cracking? 34. What are the options for selective soldering of through hole components? 35. What are the options for selective soldering of surface mount components? 36. What is one process that prevents the need for selective soldering of through hole components? 37. When does it make sense to use paste in hole process? What are some of the concerns of paste in hole process? 38. In calculating the paste volume needed for paste in hole process, do we take into account for the paste pushed in the hole during printing? 39. When paste in hole process is not feasible? 40. What does "SIR" stand for and what is a SIR Test Pattern? On what Types of boards must SIR test patterns be placed? On what side(s) of those boards? 41. What are some of the key issues with “No Clean” flux and pastes? What are the three methods of cleanliness measurements? 42. What are some of the problems in cleaning fine pitch components? 43. What changes need to be made when using fine pitch? 44. How does BGA solve some of the problems of fine pitch? What new problems does it create? 45. What is “smiling” or “head-in-pillow”BGA problem? What is “frowning” BGA problem? 46. What kind of manufacturing defect can be caused by “smiling” BGA? 47. What kind of manufacturing defect is caused by “frowning” BGA? 48. List two things you need to do to prevent opens in BGAs during wave soldering. 49. What kind of neighboring component can cause both opens and bridge simultaneously in a BGA? 50. How many types of voids are classified in theBGA industry standard? As per which industry standard? 51. What are the causes of voids in BGAs? What are the acceptable limits? \ 52. True or False: The accept/reject criteria in IPC 610 D for voids is for Process related voids only. 53. When is BGA required to be removed and replaced due to void? 54. List some of the common inspection methods 55. Why do we need overlapping inspection methods? 56. What is preferable? Bridge or an open? Why? What is the recommended ratio of bridge to open? 57. What are the concerns in rework? A) Board warpage, B) melting of solder joints of adjacent components, C) Sufficient spacing between packages, D) Other _______ 58. What are the pros and cons of laser and hot air rework? 59. List the names of industry workmanship standards? 60. Is solder in the bend of a J-lead acceptable? Why not? |
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